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New Transistor for 5nm Technology from IBM Research Alliance




At the core of stakes, we have increase in performance; accelerate cognitive computing, the Internet of Things (IoT), and other data-intensive applications delivered in the cloud.
We also have the power savings for the batteries in smartphones and other mobile products that could last two to three times longer than today’s devices, before needing to be charged.
The use of stacks of silicon nanosheets as the device structure of the transistor, instead of the standard FinFET architecture.
From a 7nm test node chip with 20 billion transistors, scientists have paved the way for 30 billion switches on a fingernail-sized chip.
In effect, IBM, its Research Alliance partners GLOBALFOUNDRIES and Samsung, and equipment suppliers have developed an industry-first process to build silicon nanosheet transistors that will enable 5 nanometer (nm) chips.
The resulting increase in performance will help accelerate cognitive computing, the Internet of Things (IoT), and other data-intensive applications delivered in the cloud. The power savings could also mean that the batteries in smartphones and other mobile products could last two to three times longer than today’s devices, before needing to be charged.

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